Enable interrupts (agu) – Freescale Semiconductor StarCore SC140 User Manual
Page 477
EI
SC140 DSP Core Reference Manual
A-163
E-J
EI
Enable Interrupts (AGU)
EI
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
ei
Instruction Formats and Opcodes
Operation
Assembler Syntax
0
→ DI
EI
EI
Clears the DI bit in the status register to enable interrupts. The EI instruction and its counterpart, the DI
instruction, can be used to delimit a non-interruptible code sequence. For example, a non-interruptible
read-modify-write sequence of execution sets can be written like this:
DI read
modify
EI write
Where read, modify, and write represent instruction(s). This instruction can appear only once in an
execution set. The effect of EI may not be immediate. That is, a pending interrupt may not be serviced as
the first execution set immediately after this instruction because of pipeline effects.
Register Address
Bit Name
Description
SR[18]
EXP
Determines execution working mode.
Register Address
Bit Name
Description
SR[19]
DI
Clears disable interrupt bit.
Register/Memory Address
Before
After
SR
$EC0000
$E40000
Instruction
Words Cycles Type
Opcode
15
8
7
0
EI
1
1
4
1
0
0
1
1
1
1
1
0
1
1
1
1
1
0
0