Two’s complement rounding (no scaling) -24 – Freescale Semiconductor StarCore SC140 User Manual
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SC140 DSP Core Reference Manual
DALU
Figure 2-6 shows the four cases for rounding a number in the Dn.h register. If scaling is set in the SR, the
rounding position is updated to reflect the alignment of the result when it is transferred to the data bus.
However, the contents of the register are not scaled.
Figure 2-6. Two’s Complement Rounding (No Scaling)
Case I
: If D0.l < $8000 (1/2), then round down (add nothing)
Before Rounding
After Rounding
Case II
: If D0.l > $8000 (1/2), then round up (add 1 to D0.h)
Case III
: If D0.l = $8000 (1/2), and the LSB of D0.h = 0, then round up (add 1 to D0.h)
Case IV
: If D0.l = $8000 (1/2), and the LSB of D0.h = 1, then round up (add 1 to D0.h)
*D0.l is always cleared, performed during RND, MPYR, and MACR.
X X . . X X X X X . . . X X X 0 1 0 0 0 1 1 X X X . . . . X X X
39
32 31
16 15
0
D0.e
D0.h
D0.l
0
X X . . X X X X X . . . X X X 0 1 0 0 0 0 0 . . . . . . . . . 0 0 0
39
32 31
16 15
0
D0.e
D0.h
D0.l*
Before Rounding
After Rounding
X X . . X X X X X . . . X X X 0 1 0 0 1 1 1 0 X X . . . . X X X
39
32 31
16 15
0
D0.e
D0.h
D0.l
1
X X . . X X X X X . . . X X X 0 1 0 1 0 0 0 . . . . . . . . . 0 0 0
39
32 31
16 15
0
D0.e
D0.h
D0.l*
Before Rounding
After Rounding
X X . . X X X X X . . . X X X 0 1 0 0 1 0 0 0 . . . . . . . . 0 0 0
39
32 31
16 15
0
D0.e
D0.h
D0.l
1
X X . . X X X X X . . . X X X 0 1 0 1 0 0 0 . . . . . . . . . 0 0 0
39
32 31
16 15
0
D0.e
D0.h
D0.l*
Before Rounding
After Rounding
X X . . X X X X X . . . X X X 0 1 0 1 1 0 0 0 . . . . . . . . 0 0 0
39
32 31
16 15
0
D0.e
D0.h
D0.l
1
X X . . X X X X X . . . X X X 0 1 1 0 0 0 0 . . . . . . . . . 0 0 0
39
32 31
16 15
0
D0.e
D0.h
D0.l*