Instruction formats and opcodes instruction fields – Freescale Semiconductor StarCore SC140 User Manual
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SC140 DSP Core Reference Manual
JFD
Instruction Formats and Opcodes
Instruction Fields
Rn
RRR
Address Register
Register/Memory Address
Before
After
SR
$00E0 0000
D1
$00 0000 0000
$00 0000 002A
D2
$00 0000 0000
$00 0000 0000
D4
$00 0000 0000
$00 0000 001A
PC
$0000 0006
$0000 0016
Instruction
Words
Cycles
1
Note 1: If the branch is not taken, it uses 1 cycle. If the branch is taken, it uses 4 cycles minus the time used
by the execution set in the delay slot. The cycle count for this instruction cannot be less than 1 cycle.
Type
Opcode
15
8
7
0
JFD label
3
1/4
3
0
0
1
1
0
1
1
0
A
A
A
a
a
1
0
0
0
0
1
A
A
A
A
A
A
A
A
A
A
A
A
A
1
0
a
a
a
a
a
a
a
a
a
a
a
a
a
a
15
8
7
0
JFD Rn
1
1/4
4
1
0
0
1
1
R R R
0
1
1
0
0
1
1
0
000
R0
010
R2
100
R4
110
R6
001
R1
011
R3
101
R5
111
R7
Note:
This instruction can specify R8-R15 as operands by using a high register prefix.
label
aaaaaaaaaaaaaaaaAAAAAAAAAAAAAAAA
32-bit absolute long address
Note:
Label must be word-aligned, LSBit = 0.