Example, Instruction formats and opcodes instruction fields, Not.w (r1) – Freescale Semiconductor StarCore SC140 User Manual
Page 653
NOT.W
SC140 DSP Core Reference Manual
A-339
Example
not.w (r1)
Instruction Formats and Opcodes
Instruction Fields
Rn
RRR
Address Register
Register/Memory Address
Before
After
R1
$0000 0050
($50)
$FFFB
$0004
Instruction
Words Cycles Type
Opcode
15
8
7
0
NOT.W (Rn)
2
2
3
0
0
0
1
0
0
1
0
1
1
1
0
1
R R R
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
8
7
0
NOT.W (SP–u5)
2
3
3
0
0
0
0
0
0
1
0
1
1
1
A
A
A
A
A
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
8
7
0
NOT.W (SP+s16)
3
3
3
0
0
1
1
1
0
1
0
A
A
A
1
1
0
1
1
0
0
1
A
A
A
A
A
A
A
A
A
A
A
A
A
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
8
7
0
NOT.W (a16)
3
2
3
0
0
1
1
1
0
1
0
A
A
A
1
1
0
0
1
0
0
1
A
A
A
A
A
A
A
A
A
A
A
A
A
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
000
R0
010
R2
100
R4
110
R6
001
R1
011
R3
101
R5
111
R7
Note:
This instruction can specify R8-R15 as operands by using a high register prefix.
a16
AAAAAAAAAAAAAAAA 16-bit unsigned absolute address
u5
AAAAA0
Unsigned 5-bit address offset
s16
AAAAAAAAAAAAAAAA
Signed 16-bit SP address offset