Freescale Semiconductor StarCore SC140 - Manual (Page 297)

Dynamic Programming Rules
SC140 DSP Core Reference Manual 7-47
Rule A.1a
AGU instructions that read the R0-R7 registers with an address register update or address pre-calculation,
or as an operand affected by a MCTL modifier field are not allowed at the first 2 cycles of an exception
service routine. This rule does not apply to R8-R15, or to R0-R7 using the no update (Rn) addressing
mode.
Example 7-86. MCTL Write to R0-R7 Use
; ISR Start
move.w (r0)+,d0
;use MCTL, not allowed
; ISR Start
nop
move.w (r0)+,d0
;use MCTL, not allowed
; ISR Start
nop
nop
move.w (r0)+,d0
;use MCTL, allowed
; ISR Start
adda r0,r1
;use MCTL, not allowed
; ISR Start
move.w d1,(r0+n0)
;use MCTL, not allowed
; ISR Start
move.w (r0)+,d0
;use MCTL, not allowed
; ISR Start
move.w (r1)+,d0
;use MCTL, not allowed
; ISR Start
move.w (r5)+,d0
;use MCTL, not allowed
; ISR Start
adda r8,r1
;use MCTL, not allowed
; ISR Start
adda r1,r8
;no modifier mode, allowed
; ISR Start
adda #$1234,r8,r1
;use MCTL, not allowed
; ISR Start
adda #$1234,r1,r8
;no modifier mode, allowed
; ISR Start
move.w (r0),d0
;no update mode, allowed
; ISR Start
move.w (r8)+,d0
;no modifier mode, allowed