Freescale Semiconductor StarCore SC140 - Manual (Page 350)

A-36 SC140 DSP Core Reference Manual
ADDNC.W
ADDNC.W
Add Without Changing
ADDNC.W
the Carry Bit (DALU)
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed By Instruction
Example
addnc.w #$ca3e,d1,d2
An add with a carry allowed would result in setting the carry bit as a result of an overflow from bit 39.
Operation Assembler Syntax
#s16 + Da
→ Dn
ADDNC.W #s16,Da,Dn {–2
15 ≤ s16 < 2 15
}
ADDNC.W #s16,Da,Dn
Sign-extends the 16-bit immediate value to 40 bits and adds it to the source data register Da. The sum is
stored in destination register Dn. The carry bit is not affected by this instruction.
Register Address Bit Name Description
SR[2] SM If set, selects 32-bit arithmetic saturation mode.
SR[5:4] S[1:0] The scaling mode bits determine which bits in the result are used in
the Ln bit calculation.
Register Address Bit Name Description
EMR[3] DOVF Set if the result cannot be represented in 40 bits, or if the result
saturates to 32 bits in arithmetic saturation mode.
Ln L If not in arithmetic saturation mode (SR [SM] = 0), calculates and
updates the Ln bit in the destination register. If in arithmetic saturation
mode (SR [SM] = 1), clears the Ln bit in the destination register.
Register/Memory Address Before After
immediate operand $FF FFFF CA3E
D1 $FF FFFF CA3E
L2:D2 $0:$FF FFFF 947C
SR $00E0 0000 $00E0 0000
EMR $0000 0000