Example, Instruction formats and opcodes, Instruction fields – Freescale Semiconductor StarCore SC140 User Manual
Page 491
IFc
SC140 DSP Core Reference Manual
A-177
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
None.
Example
ift move.w #>$ffff,d0
Instruction Formats and Opcodes
Note:
These instructions are encoded into either a one-word or two-word prefix.
Instruction Fields
ccc:
Conditional execution of the entire execution set
In the following table, true/false relates to the state of the T bit in SR: D0, D1, D2, and D3 are DALU
instructions. A0 and A1 are AGU instructions. The numbers relate to the relative offset of the instruction
from the beginning of the set, as encoded. For example, a full execution set might be D0, D1, D2, D3, A0,
A1.
000—Unconditionally executed
001—If true (D0,D2,A0), if false (D1,D3,A1)
010—If true, all the set
011—If false, all the set
100—Reserved
101—Reserved
110—If true (D0,D2,A0), always (D1,D3,A1)
111—If false (D0,D2,A0), always (D1,D3,A1)
Register Address
Bit Name
Description
SR[1]
T
True bit
Register/Memory Address
Before
After
SR
$00E4 0002
$00E4 0002
immediate
$FFFF
L0:D0
$0:$FF FFFF FFFF
Instruction
Words Cycles Type
Opcode
15
8
7
0
IFc
1
1
4
1
0
0
1
a
a
a
0
1
1
0
p
j
c
c
c
15
8
7
0
IFc
2
1
4
0
0
1
1
a
a
a
0
H
t
h
p
j
c
c
c
1
0
1
b
B
e
E
T
b
B
e
E
b
B
e
E