Freescale Semiconductor StarCore SC140 - Manual (Page 271)

Static Programming Rules
SC140 DSP Core Reference Manual 7-21
Rule D.4
Instructions that read the PC register (implicitly or explicitly) as a source operand are not allowed in a
RTED/RTSD/RTSTKD delay slot. This rule does not apply to the MARK instruction that reads the PC
register for the EOnCE trace buffer.
Example 7-33. PC Read in a Return Delay Slot
rted
adda pc,r0
;not allowed
rtsd
dosetup0 _label
;not allowed
Rule D.5
A MOVE-like instruction that writes the SR register cannot be grouped in a VLES with a BSR, BSRD,
JSR or JSRD instruction. For mutually exclusive IFc subgroups in a VLES, this rule applies independently
to each subgroup.
Example 7-34. SR Write with a Subroutine Call
pop sr jsr r0 ;not allowed
Rule D.5a
A MOVE-like instruction that writes the SR register is not allowed in the delay slot of a BSRD or JSRD
instruction.
Example 7-35. SR Write in BSRD or JSRD Delay Slot
bsrd _label
pop sr ;not allowed
Rule D.6
Instructions that read or write the SP register are not allowed in the delay slot of delayed return (RTSD,
RTED, , and RTSTKD) instructions. This rule also applies to implicit SP register writes (push and pop
instructions).
Example 7-36. SP Use in Return Delay Slots
rtsd
tfra r0,sp
;not allowed
rted
tfra sp,r0
;not allowed
rtsd
tfra r0,osp
;allowed
rtstkd
tfra
osp,r0 ;allowed
rtstkd
pop d0
;not allowed