Freescale Semiconductor StarCore SC140 - Manual (Page 138)

4-28 SC140 DSP Core Reference Manual
EOnCE Module Internal Architecture
Figure 4-14 displays a block diagram of the trace unit.
Figure 4-14. Trace Unit Block Diagram
4.5.5.1 Change of Flow and Interrupt Tracing
The trace logic can be configured to trace change of flow instructions. Upon execution of such an
instruction, the source and destination addresses of the change of flow event are traced. In case of a
delayed change of flow instruction, the source address is also that of the change of flow instruction.
The following change of flow instructions are those that can be traced:
— BT, BF, BTD, BFD
— BRA, BRAD
— JMP JMPD
— JT, JF, JTD, JFD
— JSR, JSRD
— BSR, BSRD
— RTS, RTSD
— RTSTK, RTSTKD
— RTE, RTED
Address Strobes Data
Trace Unit
Trace Unit
Controller
Control Register
Read Pointer
Write Pointer
PC
Hardware Loops
MARK
Change of Flow
Interrupts
Normal Execution Set
Enable Trace
Disable Trace
Trace Buffer (TB)
Off-Core