Freescale Semiconductor StarCore SC140 - Manual (Page 650)

A-336 SC140 DSP Core Reference Manual
NOT
NOT
Binary Inversion of a 16-Bit Operand (BMU)
NOT
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
not D0.L
Operation Assembler Syntax
~DR.L
→ DR.L
NOT DR.L
~DR.H
→ DR.H
NOT DR.H
NOT DR.L
Inverts the LP of a source data or address register (DR). The other bits are unchanged. This instruction is
assembler-mapped to BMCHG DR.L with the full mask enabled.
NOT DR.H
Inverts the HP of a source data or address register (DR). The other bits are unchanged. This instruction is
assembler-mapped to BMCHG DR.H with the full mask enabled.
Register Address Bit Name Description
Ln L Clears the Ln bit in the destination registers.
Register/Memory Address Before After
L0:D0 $1:$00 3FF2 FFFB $0:$00 3FF2 0004