Freescale Semiconductor StarCore SC140 - Manual (Page 736)

A-422 SC140 DSP Core Reference Manual
VSL
VSL
Viterbi Shift Left Move (AGU)
VSL
Note: In the operation fields, the term
<< 1 indicates shift left 1 bit and fill the LSB with a zero. The term
<< 1+1 indicates shift left 1 bit and fill the LSB with a one.
For VSL.4W and VSL.4F, the high register quartet D10:D14:D9:D11 could be used with prefix
encoding instead of D2:D6:D1:D3.
For VSL.2W and VSL.2F, the high register pair D9:D11 could be used with prefix encoding
instead of D1:D3.
* Words 0, 1, 2, and 3 have different meanings in big and little endian modes, as follows:
Operation Assembler Syntax
If VF2 == 1, then (D3.L
<< 1+1) → (word 3)*
else (D1.L
<< 1+1) → (word 3)
If VF0 == 1, then (D3.L
<< 1) → (word 2)
else (D1.L
<< 1) → (word 2)
D2.L
→ (word 0)
D6.L
→ (word 1)
VSL.4W D2:D6:D1:D3,(Rn)+N0
If VF3 == 1, then (D3.H
<< 1+1) → (word 3)
else (D1.H
<< 1+1) → (word 3)
If VF1 == 1, then (D3.H
<< 1) → (word 2)
else (D1.H
<< 1) → (word 2)
D2.H
→ (word 0)
D6.H
→ (word 1)
VSL.4F D2:D6:D1:D3,(Rn)+N0
If VF2 == 1, then (D3.L
<< 1+1) → (word 1)
else (D1.L
<< 1+1) → (word 1)
If VF0 == 1, then (D3.L
<< 1) → (word 0)
else (D1.L
<< 1) → (word 0)
VSL.2W D1:D3,(Rn)+N0
If VF3 == 1, then (D3.H
<< 1+1) → (word 1)
else (D1.H
<< 1+1) → (word 1)
If VF1 == 1, then (D3.H
<< 1) → (word 0)
else (D1.H
<< 1) → (word 0)
VSL.2F D1:D3,(Rn)+N0
Memory Address
Word Big Endian Mode Little Endian Mode
0 (Rn+2) (Rn)
1 (Rn) (Rn+2)
2 (Rn+6) (Rn+4)
3 (Rn+4) (Rn+6)