Inca, Increment register (agu), Example 1 – Freescale Semiconductor StarCore SC140 User Manual
Page 515: Example 2, Operation assembler syntax
INCA
SC140 DSP Core Reference Manual
A-201
INCA
Increment Register (AGU)
INCA
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
None.
Example 1
inca r0
Example 2
inca r0
Operation
Assembler Syntax
Rx + 1
→ Rx
INCA Rx
INCA Rx
Adds one to an AGU register (Rx). The stack pointer (SP) cannot be used as an operand by this instruction.
Note:
The assembler maps this instruction to ADDA #u5,Rx, where #u5 = 1.
Register Address
Bit Name
Description
MCTL[31:0]
AM3–AM0 Address modification bits when updating R0–R7. Otherwise, the
instruction is not affected by MCTL.
Register/Memory Address
Before
After
MCTL
$0000 0000
R0
$074F 312A
$074F 312B
Register/Memory Address
Before
After
MCTL
$0000 0000
R0
$FFFF FFFF
$0000 0000