Freescale Semiconductor StarCore SC140 - Manual (Page 683)

RTED
SC140 DSP Core Reference Manual A-369
Example
rted
Instruction Formats and Opcodes
Instruction Comment
move.w #$2000,vba Load the vector base address register.
trap Issue a software interrupt and enter the exception state.
- - -
Instructions in the trap routine located at the address found
at $2000 and trap_vector offset.
rted not d4,d2
inc d1
Execute the not instruction and the inc d1 instruction in the
delay slot. Return to the original working mode (see exam-
ple for RTE).
Instruction Words Cycles
1
Note 1: The shadow SP is valid or not valid. RTED uses 5 cycles if the shadow SP is valid. RTED uses 6 cycles
if the shadow SP is not valid. To get the correct cycle count for this instruction, subtract the execution time
used by the execution set in the delay slot. The cycle count for this instruction cannot be less than 2 cycles.
Type Opcode
15 8 7 0
RTED 1 5/6 4 1 0 0 1 1 1 1 1 0 1 1 1 0 0 1 0