Freescale Semiconductor StarCore SC140 - Manual (Page 452)

A-138 SC140 DSP Core Reference Manual
DEBUGEV
DEBUGEV
Signal a Debug Event (AGU)
DEBUGEV
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
None.
Instruction Formats and Opcodes
Operation Assembler Syntax
DEBUGEV
DEBUGEV
Generates a debug event. It is an EOnCE dedicated instruction. If the EOnCE has not been enabled since
reset, issuing DEBUGEV has no effect. If the EOnCE is enabled, the effect of this instruction depends on
the programming of EOnCE control registers. Receipt of an EOnCE event can cause the core to enter the
debug mode, generate an exception, or enable the trace buffer. The delay from the DEBUGEV instruction
to entering debug mode or generating an exception is not precise; it could be a few execution sets. Events
can also be counted before an action takes place.
Instruction Words Cycles Type Opcode
15 8 7 0
DEBUGEV 1 2 4 1 0 0 1 1 1 1 0 0 1 1 1 0 0 0 1