Freescale Semiconductor StarCore SC140 - Manual (Page 295)

Dynamic Programming Rules
SC140 DSP Core Reference Manual 7-45
7.6.5.2 VLES-Based COF Rules
VLES-based COF rules are detected like static rules, except the rule is detected from the simulation trace,
not the source code order. A VLES having a COF instruction is counted like any other VLES. Exceptions
to the above are JSR/D and BSR/D instructions, guaranteeing an inherent one VLES distance between the
instructions in the source execution flow (including the delay slot), and the instructions in the destination
flow.
The relevant VLES-based rules that the simulator detects across COF boundaries are:
• Non-loop COF rules
— T.1
— SR.2
— SR.4
• Loop COF rules
— L.L.5
— L.L.6
— L.D.1
— L.D.2
— L.D.3
— L.D.5
— L.D.6
— L.D.7
— L.D.8
— L.D.9
— L.C.10
— L.G.3
— L.G.4
Example 7-84. Set condition during a COF, and use it at the destination (T.1)
bt _des1cmpeq d0,d1
...
_des1 ift tfra r0,r1 ;Not allowed
btd _des2cmpeq d0,d1
nop
...
_des2 ift tfra r0,r1 ; Allowed
bt _des3
cmpeq d0,d1
...
_des3 ift tfra r0,r1 ; Not allowed
jsrd _des4
cmpeq d0,d1
...
_des4 ift tfra r0,r1 ; Allowed (1 extra VLES calculated between cmpeq and
ift)