Freescale Semiconductor StarCore SC140 - Manual (Page 712)

A-398 SC140 DSP Core Reference Manual
SUBNC.W
SUBNC.W
Subtract Without Changing
SUBNC.W
the Carry Bit (DALU)
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
subnc.w #$15,d0
Operation Assembler Syntax
Dn – #s16
→ Dn
SUBNC.W #s16,Dn {–2 15 ≤ s16 < 2 15 }
SUBNC.W #s16,Dn
Subtracts an immediate signed 16-bit value from a source data register (Dn) and stores the result in the
destination data register (Dn). The first operand is a 16-bit immediate data that is interpreted as a signed
integer. The 16 bits are sign-extended to form a 32-bit operand. The carry bit is not affected by this
instruction.
Register Address Bit Name Description
SR[2] SM If set, selects 32-bit arithmetic saturation mode.
SR[5:4] S[1:0] Scaling mode bits determine which bits in the result are used in the Ln
bit calculation.
Register Address Bit Name Description
EMR[2] DOVF Set if the result cannot be represented in 40 bits, or if the result
saturates to 32 bits in arithmetic saturation mode.
Ln L If not in arithmetic saturation mode (SR [SM] = 0), calculates and
updates the Ln bit in the destination register. If in arithmetic saturation
mode (SR [SM] = 1), clears the Ln bit in the destination register.
Register/Memory Address Before After
SR $00E0 0000 $00E0 0000
Immediate $0015
L0:D0 $0:$00 0000 0010 $0:$FF FFFF FFFB
EMR $0000 0000