Bitwise shift right one bit (dalu), Instruction formats and opcodes, Instruction fields – Freescale Semiconductor StarCore SC140 User Manual
Page 540: Operation assembler syntax
A-226
SC140 DSP Core Reference Manual
LSR
LSR
Bitwise Shift Right One Bit (DALU)
LSR
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
lsr d4
Instruction Formats and Opcodes
Note:
** indicates serial grouping encoding.
Instruction Fields
Dn
FFF
Single Source/Destination Data Register
Operation
Assembler Syntax
(Dn>>>1)
→ Dn; 0 → Dn[39]
LSR Dn
LSR Dn
Shifts the contents of a data register (Dn) right one bit. The LSB (bit 0) is shifted into the carry (C) bit in
the status register. Bits [39:1] are copied to bits [38:0]. Bit 39 is cleared.
Register Address
Bit Name
Description
SR[0]
C
Dn[0] is stored in the C bit.
Ln
L
Clears the Ln bit in the destination register.
Register/Memory Address
Before
After
SR
$00E4 0000
$00E4 0001
L4:D4
$0:$FF CCCC CCCD
$0:$7F E666 6666
Instruction
Words Cycles Type
Opcode
15
8
7
0
LSR Dn
1
1
1
0
*
1
0
0
1
F
F
F
1
1
0
1
1
1
0
000
D0
010
D2
100
D4
110
D6
001
D1
011
D3
101
D5
111
D7
Note:
This instruction can specify D8-D15 as operands by using a prefix.