Freescale Semiconductor StarCore SC140 - Manual (Page 557)

MACUU
SC140 DSP Core Reference Manual A-243
MACUU
Fractional Multiply-Accumulate
MACUU
Unsigned By Unsigned (DALU)
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
macuu d2,d3,d1
1.111 1111 1111 1111$FFFF
x 1.111 1111 1111 1111$FFFF
1 1.111 1111 1111 1100 0000 0000 0000 0001$01 FFFC 0001
+ 0.111 1111 1111 1111 1111 1111 1111 1111$00 7FFF FFFF
10 0.111 1111 1111 1100 0000 0000 0000 0001$02 7FFC 0001
Operation Assembler Syntax
Dn + (Dc.L * Dd.L)
→ Dn
MACUU Dc,Dd,Dn
MACUU Dc,Dd,Dn
Performs unsigned fractional multiplication of the unsigned 16-bit LP of one data register (Dc) by the
unsigned 16-bit LP of the other data register (Dd). It then adds the zero-extended 32-bit product to a data
register (Dn).
Register Address Bit Name Description
Ln L Clears the Ln bit in the destination register.
EMR[2] DOVF Set if the result cannot be represented in 40 bits.
Register/Memory Address Before After
D2 $00 0000 FFFF
D3 $00 0000 FFFF
L1:D1 $0:$00 7FFF FFFF $0:$02 7FFC 0001
EMR $0000 0000