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Bmclr, Bit-masked clear a 16-bit operand (bmu), Description – Freescale Semiconductor StarCore SC140 User Manual

Page 389

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BMCLR;Instruction Set:BMCLR

SC140 DSP Core Reference Manual

A-75

BMCLR

Bit-Masked Clear a 16-Bit Operand (BMU)

BMCLR

Description

These operations use an unsigned 16-bit immediate data mask to clear selected bits in the destination
operand. For each bit i that is set (selected) in the mask, the bit i in the corresponding destination operand’s
bit position is cleared. Bits that are not selected as well as bits in the other part of the register are
unaffected. These operations read from a register, modify the retrieved value, and write the new value back
to that register.

Note:

Special care must be taken when using this instruction to clear bits on the EMR register due to this
register’s special functionality. See Chapter 3 for a description of this behavior.

Status and Conditions that Affect Instruction

Operation

Assembler Syntax

0

→ C1.H

i

(i denotes bits=1 in #u16)

BMCLR #u16,C1.H {0

≤ u16 < 2

16

}

0

→ C1.L

i

BMCLR #u16,C1.L {0

≤ u16 < 2

16

}

0

→ DR.H

i

BMCLR #u16,DR.H {0

≤ u16 < 2

16

}

0

→ DR.L

i

BMCLR #u16,DR.L {0

≤ u16 < 2

16

}

BMCLR #u16,C1.H

Clears selected bits in the HP contents of a control register (C1).

BMCLR #u16,C1.L

Clears selected bits in the LP contents of a control register (C1).

BMCLR #u16,DR.H

Clears selected bits in the HP contents of a data or address register (DR).

BMCLR #u16,DR.L

Clears selected bits in the LP contents of a data or address register (DR).

Register Address

Bit Name

Description

SR[18]

EXP

Determines execution working mode for instructions that have these
registers as an operand.