2 data event detection channel (edcd), 1 edcd control register (edcd_ctrl), Data event detection channel (edcd) -58 – Freescale Semiconductor StarCore SC140 User Manual
Page 168: Edcd control register (edcd_ctrl) -58, Edcd_ctrl description -58, Section 4.9.2.1, “edcd control register, Edcd_ctrl), Like, Table 4-20 describes the edcd_ctrl fields
4-58
SC140 DSP Core Reference Manual
Event Detection Unit (EDU) Channels and Registers
4.9.2 Data Event Detection Channel (EDCD)
In order to set a watchpoint on a given data value, the user should:
•
Write the watched value into the EDCD_REF.
•
Enter a write mask into the EDCD_MASK.
•
Specify the type of access (read or write) in the EDCD_CTRL.
•
Specify the data type (byte/word/long) in the EDCD_CTRL.
•
Enable the event detection unit in EDCD_CTRL, as the last action.
The following sections describe the functionality of these registers.
4.9.2.1 EDCD Control Register (EDCD_CTRL)
Figure 4-22 displays the configuration of EDCD_CTRL.
The shaded bits are reserved and should be initialized with zeros for future software compatibility.
Figure 4-22. EDCD Control Register (EDCD_CTRL)
Table 4-20 describes the EDCD_CTRL fields.
BIT 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BIT 0
AWS
EDCDEN
CCS
ATS
TYPE
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 4-20. EDCD_CTRL Description
Name
Description
Settings
R
Bits
14-15
Reserved
R
Bits
13–10
Reserved