Freescale Semiconductor StarCore SC140 - Manual (Page 309)

LPMARK Rules
SC140 DSP Core Reference Manual 7-59
LPMARK Rule L.C.11 + L.C.12
A delayed COF instruction is not allowed at LPA-1 or LPB-1 of a loop.
Example 7-102. Delay Slot at LPA or LPB of a Loop
jmpd_dest ;not allowed
nop {lpmarkb set}
nop
nop
jmpd _dest ;not allowed
nop {lpmarka set}
7.8.3.6 General Looping Rules
LPMARK Rule L.G.3 + L.G.4
At least one VLES is required between a MOVE-like instruction that reads the SR register and LPA or
LPB of a loop.
Example 7-103. SR Read to LPA or LPB of a Loop
dosetup1 label1
doen1 #5
label1
inc d1
move.l sr,d0
;not allowed
inc d2 {lpmarkb set}
move.l #mem_l1,r1
move.l #mem_l2,r0
doensh0 #$10
push sr
;not allowed
inc d0 {lpmarka set}
7.8.3.7 Rule Detection Across Exception Boundaries
LPMARK Rule SR.6
LPA or LPB cannot be the first two VLES of an exception service routine.
7.8.4 LPMARK Programming Guidelines
The rules in this section cannot be detected by the simulator from its execution trace. The following rules
must be detected by the programmer, and can be avoided by good programming practices.