Freescale Semiconductor StarCore SC140 - Manual (Page 134)

4-24 SC140 DSP Core Reference Manual
EOnCE Module Internal Architecture
4.5.3.2 Data Event Detection Channel (EDCD)
The EDCD is one of the main elements of the EDU. It has all the logic required to detect data values
according to a user-programmable configuration.
Figure 4-12 shows the EDCD block diagram.
Figure 4-12. EDCD Block Diagram
The EDCD register set is shown below.
Table 4-9. EDCD Register Set
The functionality of the EDCD registers is described in Section 4.9.2, “Data Event Detection Channel
(EDCD).”
Register Name Description
EDCD_CTRL EDCD control register
EDCD_MASK EDCD mask register
EDCD_REF EDCD reference value register
XDBAW XD
BA
R
Control Register
Reference Value Register
Two Comparators
XD
BBR
XDBBW
EDCD MASK Register
Access Type Select
EED
Event 0..5
Count Event
MUX
EventD
External Event 6,7