Freescale Semiconductor StarCore SC140 - Manual (Page 46)

2-14 SC140 DSP Core Reference Manual
DALU
2.2.1.5 Scaling
The data shifters in the shifter/limiter unit can perform the following data shift operations:
• Scale up—Shift data one bit to the left
• Scale down—Shift data one bit to the right
• No scaling—Pass the data unshifted
The eight shifters permit direct dynamic scaling of fixed-point data without additional program steps. For
example, this permits straightforward block floating-point implementation of Fast Fourier Transforms
(FFTs).
Scaling occurs if programmed in the scaling mode bits S0 and S1 (bits 4 and 5 in the SR). Scaling of
operands only occurs with the MOVES.F, MOVES.2F, MOVES.4F, and MOVES.L instructions, moving
data from a DALU register (or registers) to memory. The data in the register is not changed, only the data
that is transferred. The scaling mode also affects the Ln bit calculation and the rounding function for a set
of DALU instructions. Scaling is disabled when the arithmetic saturation mode is set. See
Section 3.1.1,
“Status Register (SR),” and below for further details. An example of scaling is provided in Table 2-7.
2.2.1.6 Limiting
The limiting capability is enabled only for the MOVES.F, MOVES.2F, MOVES.4F, and MOVES.L
instructions, and not for any other fractional moves such as MOVE.F. These instructions move data from
DALU register(s) to memory. The limiting operation takes place in two steps: first, calculating the Ln bit
when a previous ALU instruction wrote to a register, and second, transferring the data from that register
with a MOVES instruction. The transferred data is limited if the Ln bit is set.
2.2.1.6.1 Calculating the Ln Bit
The Ln bit can be affected by ALU instructions which are capable of using the extension portion of a data
register. The only use of the Ln bit is to set up or prepare for a subsequent MOVES instruction. The Ln bit
is calculated based on the effective extension bits shown in Table 2-8. These are the bits to the left of the
implied decimal point after scaling. If the bits are not all zeros or all ones, the extension is effectively in
use and the Ln bit will be set. The Ln bit is cleared as data is written to a DALU register if the defining bits
below are all zeros or all ones.
Table 2-7. Scaling Example
Instruction
Memory/
Register
New Value Comments
move.w #$0030,r0 r0 $0000 0030 R0 initialized for first memory write
moveu.w #$0200,d0.h d0 $0200 0000 D0 written
bmset #$10,sr.l sr $0000 0010 Scale down set in SR
moves.f d0,(r0)+ $0030 $0100 Memory written with scaled down value
move.l #$00e40020,sr sr $00e4 0020 Scale up set in SR
moves.f d0,(r0) $0032 $0400 Memory written with scaled up value