Freescale Semiconductor StarCore SC140 - Manual (Page 292)

7-42 SC140 DSP Core Reference Manual
Dynamic Programming Rules
7.6.2 Memory Access Rules
Rule A.5
Only one memory write instruction to the same location can be grouped in a VLES. Multiple memory
write instructions grouped in a VLES must write to different locations, so the order that multiple writes
occur does not change the memory results. If this is not done, the memory contents of the accessed
locations are undefined. For mutually exclusive IFc subgroups in a VLES, this rule applies independently
to each subgroup.
Example 7-78. Multiple Memory Writes to the Same Location
move.l d0,(r0) move.l d1,(r0) ;not allowed
move.l d0,(r0+n0) move.l d1,(r0+n0) ;not allowed
move.l d0,$100 move.b d1,$103 ;not allowed
move.l d0,(r0) move.l d1,(r1) ;not allowed if addresses overlap
move.l d0,(r0) move.b d1,(r0+n0) ;not allowed if addresses overlap
move.l d0,(r0) move.w d1,(r1+$6) ;not allowed if addresses overlap
Rule A.6
A memory read instruction having a pre-calculated address cannot be grouped in a VLES with a memory
write instruction not having a pre-calculated address to the same memory location. These memory accesses
must write to different locations, so the order that multiple accesses occur does not change the memory
results. If this is not done, the memory contents of the accessed locations are undefined. For mutually
exclusive IFc subgroups in a VLES, this rule applies independently to each subgroup.
Example 7-79. Pre-Calculated Memory Accesses to the Same Location
move.w (r0+$3),d0 move.l d1,(r0) ;not allowed
move.b (r0+n0),d0 move.l d1,(r0) ;not allowed if addresses overlap
move.w (r0+$6),d0 move.b d1,(r1) ;not allowed if addresses overlap
bmset.w #$123,(sp+$10) move.w d0,(r0) ;not allowed if addresses overlap
pop d0 move.l d1,(r0) ;not allowed if addresses overlap
; and shadow SP is not valid
rts move.w d0,(r0) ;not allowed if addresses overlap
; and shadow SP is not valid
Rule D.7
Instructions in the delay slot of delayed return instructions (RTED, RTSD, RTSTKD) cannot write to a
memory address in the range (SP
−8 ≤ address < SP), where SP is the value of the active stack pointer
register at the beginning of the VLES having the RTED, RTSD or RTSTKD instruction.
Example 7-80. Memory Write to Stack in a Return Delay Slot
tfra sp,r0
move.l d1,(r0-8)
;allowed
rtsd
move.l d2,(r0-8)
;not allowed