Required connections, Required connections -2 – Altera Embedded Peripherals IP User Manual
Page 42
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The CompactFlash core maps the Avalon-MM bus signals to the CompactFlash device with proper
timing, thus allowing Avalon-MM master peripherals to directly access the registers on the CompactFlash
device.
Compact Flash
For more information, refer to the CF+ and CompactFlash specifications available at www.compact-
flash.org.
Required Connections
The table below lists the required connections between the CompactFlash core and the CompactFlash
device.
Table 4-1: Core to Device Required Connections
CompactFlash Interface Signal
Name
Pin Type
CompactFlash Pin
Number
addr[0]
Output
20
addr[1]
Output
19
addr[2]
Output
18
addr[3]
Output
17
addr[4]
Output
16
addr[5]
Output
15
addr[6]
Output
14
addr[7]
Output
12
addr[8]
Output
11
addr[9]
Output
10
addr[10]
Output
8
atasel_n
Output
9
cs_n[0]
Output
7
cs_n[1]
Output
32
data[0]
Input/Output
21
data[1]
Input/Output
22
data[2]
Input/Output
23
data[3]
Input/Output
2
data[4]
Input/Output
3
data[5]
Input/Output
4
data[6]
Input/Output
5
4-2
Required Connections
UG-01085
2014.24.07
Altera Corporation
Compact Flash Core
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)