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Pll cores -1, Altera msi to gic generator -1, Altera interrupt latency counter -1 – Altera Embedded Peripherals IP User Manual

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Software Programming Model.................................................................................................................31-3

Software Files..................................................................................................................................31-4

Using the Performance Counter..................................................................................................31-4

Interrupt Behavior......................................................................................................................... 31-6

Performance Counter API........................................................................................................................31-6

PERF_RESET()...............................................................................................................................31-6

PERF_START_MEASURING().................................................................................................. 31-7

PERF_STOP_MEASURING().....................................................................................................31-7

PERF_BEGIN().............................................................................................................................. 31-7

PERF_END().................................................................................................................................. 31-8

perf_print_formatted_report().................................................................................................... 31-8

perf_get_total_time().................................................................................................................... 31-9

perf_get_section_time()................................................................................................................31-9

perf_get_num_starts()................................................................................................................ 31-10

alt_get_cpu_freq()....................................................................................................................... 31-10

Document Revision History...................................................................................................................31-11

PLL Cores...........................................................................................................32-1

Core Overview............................................................................................................................................32-1

Functional Description............................................................................................................................. 32-2

ALTPLL Megafunction................................................................................................................. 32-2

Clock Outputs................................................................................................................................ 32-2

PLL Status and Control Signals....................................................................................................32-2

System Reset Considerations........................................................................................................32-3

Instantiating the Avalon ALTPLL Core..................................................................................................32-3

Instantiating the PLL Core....................................................................................................................... 32-3

Hardware Simulation Considerations.................................................................................................... 32-5

Register Definitions and Bit List..............................................................................................................32-5

Status Register................................................................................................................................ 32-5

Control Register............................................................................................................................. 32-6

Phase Reconfig Control Register................................................................................................. 32-7

Document Revision History.....................................................................................................................32-8

Altera MSI to GIC Generator............................................................................33-1

Overview..................................................................................................................................................... 33-1

Background.................................................................................................................................................33-1

Feature Description................................................................................................................................... 33-1

Interrupt Servicing Process.......................................................................................................... 33-2

Registers of Component................................................................................................................33-3

Unsupported Feature.................................................................................................................... 33-4

Altera SMBus Core Interface....................................................................................................................33-5

Component Interface.................................................................................................................... 33-7

Component Parameterization......................................................................................................33-7

Document Revision History.....................................................................................................................33-9

Altera Interrupt Latency Counter.....................................................................34-1

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