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Data register, Direction register – Altera Embedded Peripherals IP User Manual

Page 128

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Table 12-2: Register Map for the PIO Core

Offset

Register Name

R/W

(n-1)

...

2

1

0

0

data

read access

R

Data value currently on PIO inputs

write access

W

New value to drive on PIO outputs

1

direction

(1)

R/W

Individual direction control for each I/O

port. A value of 0 sets the direction to input;

1 sets the direction to output.

2

interruptmask

(1)

R/W

IRQ enable/disable for each input port.

Setting a bit to 1 enables interrupts for the

corresponding port.

3

edgecapture

(1)

,

(2)

R/W

Edge detection for each input port.

4

outset

W

Specifies which bit of the output port to set.

5

outclear

W

Specifies which output bit to clear.

Table 12-2

:

1. This register may not exist, depending on the hardware configuration. If a register is not

present, reading the register returns an undefined value, and writing the register has no effect.

2. If the option Enable bit-clearing for edge capture register is turned off, writing any value to

the

edgecapture

register clears all bits in the register. Otherwise, writing a 1 to a particular bit

in the register clears only that bit.

data Register

Reading from

data

returns the value present at the input ports. If the PIO core hardware is configured in

output-only mode, reading from

data

returns an undefined value.

Writing to

data

stores the value to a register that drives the output ports. If the PIO core hardware is

configured in input-only mode, writing to

data

has no effect. If the PIO core hardware is in bidirectional

mode, the registered value appears on an output port only when the corresponding bit in the

direction

register is set to 1 (output).

direction Register

The

direction

register controls the data direction for each PIO port, assuming the port is bidirectional.

When bit n in

direction

is set to 1, port n drives out the value in the corresponding bit of the

data

register.
The

direction

register only exists when the PIO core hardware is configured in bidirectional mode. The

mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at

runtime. In input-only or output-only mode, the

direction

register does not exist. In this case, reading

direction

returns an undefined value, writing

direction

has no effect.

12-6

data Register

UG-01085

2014.24.07

Altera Corporation

PIO Core

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