Software programming model, Hal system library support, Software files – Altera Embedded Peripherals IP User Manual
Page 162: Programming with the on-chip fifo memory, Software programming model -7, Hal system library support -7, Software files -7, Programming with the on-chip fifo memory -7
Avalon-ST Port Settings
The following parameters allow you to specify the size and error handling of the Avalon-ST port or ports:
• Bits per symbol
• Symbols per beat
• Channel width
• Error width
If the symbol size is not a power of two, it is rounded up to the next power of two. For example, if the
bits per symbol is 10, the symbol will be mapped to a 16-bit memory location. With 10-bit symbols,
the maximum number of symbols per beat is two.
Enable packet data provides an option for packet transmission.
Software Programming Model
The following sections describe the software programming model for the on-chip FIFO memory core,
including the register map and software declarations to access the hardware. For Nios II processor users,
Altera provides HAL system library drivers that enable you to access the on-chip FIFO memory core
using its HAL API.
HAL System Library Support
The Altera-provided driver implements a HAL device driver that integrates into the HAL system library
for Nios II systems. HAL users should access the on-chip FIFO memory via the familiar HAL API, rather
than accessing the registers directly.
Software Files
Altera provides the following software files for the on-chip FIFO memory core:
•
altera_avalon_fifo_regs.h
—This file defines the core's register map, providing symbolic constants to
access the low-level hardware.
•
altera_avalon_fifo_util.h
—This file defines functions to access the on-chip FIFO memory core hardware.
It provides utilities to initialize the FIFO, read and write status, enable flags and read events.
•
altera_avalon_fifo.h
—This file provides the public interface to the on-chip FIFO memory
•
altera_avalon_fifo_util.c
—This file implements the utilities listed in
altera_avalon_fifo_util.h
.
Programming with the On-Chip FIFO Memory
This section describes the low-level software constructs for manipulating the on-chip FIFO memory core
hardware. The table below lists all of the available functions.
Table 16-2: On-Chip FIFO Memory Functions
Function Name
Description
altera_avalon_fifo_init()
Initializes the FIFO.
altera_avalon_fifo_read_status()
Returns the integer value of the specified bit of
the status register. To read all of the bits at once,
use the
ALTERA_AVALON_FIFO_STATUS_ALL
mask.
UG-01085
2014.24.07
Software Programming Model
16-7
On-Chip FIFO Memory Core
Altera Corporation