Altera Embedded Peripherals IP - Manual (Page 265)

The mailbox component contains two mutexes: One to ensure unique write access to shared memory and
one to ensure unique read access from shared memory. The mailbox core is used in conjunction with a
separate memory in the system that is shared among multiple processors.
Mailbox functionality using the mutexes and memory is implemented entirely in the software. Refer to
Software Programming Model section for details about how to use the mailbox core in software.
For a detailed description of the mutex hardware operation, refer to
“Mutex Core” on page 23–1
Configuration
You can instantiate and configure the mailbox core in an SOPC Builder system using the following
process:
1. Decide which processors share the mailbox.
2. On the SOPC Builder System Contents tab, instantiate a memory component to serve as the mailbox
buffer. Any RAM can be used as the mailbox buffer. The mailbox buffer can share space in an existing
memory, such as program memory; it does not require a dedicated memory.
3. On the SOPC Builder System Contents tab, instantiate the mailbox component. The mailbox
MegaWizard ™ Interface presents the following options:
• Memory module—Specifies which memory to use for the mailbox buffer. If the Memory module
list does not contain the desired shared memory, the memory is not connected in the system
correctly. Refer to Step 4.
• CPUs available with this memory—Shows all the processors that can share the mailbox. This field
is always read-only. Use it to verify that the processor connections are correct. If a processor that
needs to share the mailbox is missing from the list, refer to Step 4.
• Shared mailbox memory offset—Specifies an offset into the memory. The mailbox message buffer
starts at this offset.
• Mailbox size (bytes)—Specifies the number of bytes to use for the mailbox message buffer. The
Nios II driver software provided by Altera uses eight bytes of overhead to implement the mailbox
functionality. For a mailbox capable of passing only one message at a time, Mailbox size (bytes)
must be at least 12 bytes.
• Maximum available bytes—Specifies the number of bytes in the selected memory available for use
as the mailbox message buffer. This field is always read-only.
4. If not already connected, make component connections on the SOPC Builder System Contents tab.
a. Connect each processor’s data bus master port to the mailbox slave port.
b. Connect each processor’s data bus master port to the shared mailbox memory.
Software Programming Model
The following sections describe the software programming model for the mailbox core. For Nios II
processor users, Altera provides routines to access the mailbox core hardware. These functions are specific
to the mailbox core and directly manipulate low-level hardware.
27-2 Configuration
UG-01085
2014.24.07
Altera Corporation Mailbox Core
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