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Sequence number field, Read and write burst count fields, Read and write stride fields – Altera Embedded Peripherals IP User Manual

Page 225: Control field

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program the length field with the largest possible value of 0xFFFFFFFF. This allows you to specify a

maximum packet size for each descriptor that has packet support enabled.

Sequence Number Field

The sequence number field is available only when using extended descriptors.The sequence number is an

arbitrary value that you assign to a descriptor so that you can determine which descriptor is being

operated on by the read and write masters. When performing memory-mapped to memory-mapped

transfers this value is tracked independently for masters since each can be operating on a different

descriptor. To use this functionality simply program the descriptors to have unique sequence numbers

then access the dispatcher CSR slave port to determine which descriptor is being operated on.

Read and Write Burst Count Fields

The programmable read and write burst counts are only available when using the extended descriptor

format. The programmable burst count is optional and can be disabled in the read and write masters.

Because the programmable burst count is an eight bit field for each master, you can at most only program

burst counts of 1 to 128. Programming a value of zero or anything larger than 128 beats will be converted

to the maximum burst count specified for each master automatically.
The maximum programmable burst count is 128 but when you instantiate the DMA, you can have

different selections up to 1024. Refer to the MAX_BURST_COUNT parameter in the component

parameters table. If you program for greater than 128, then you will still have a burst count of 128 but if

you program to 0 then you will get the maximum burst count selected during If you program for greater

than 128, then you will still have a burst count of 128. However, if you program to 0, then you will get the

maximum burst count selected during instantiation time.

Related Information

Component Parameters

on page 22-5

For more information, refer to the MAX_BURST_COUNT parameter.

Read and Write Stride Fields

The read and write stride fields are optional and only available when using the extended descriptor

format. The stride value determines how the read and write masters increment the address when

accessing memory. The stride value is in terms of words so the address incrementing is dependent on the

master data width.
When stride is enabled, the master defaults to sequential accesses which is the equivalent to a stride

distance of 1. A stride of 0 instructs the master to continuously access the same address. A stride of 2

instructs the master to skip every other word in a sequential transfer. You can use this feature to perform

interleaved data accesses or perform a frame buffer row and column transpose. The read and write stride

distances are stored independently allowing you to use different address incrementing for read and write

accesses in memory-to-memory transfers. For example to perform a 2:1 data decimation transfer you

would simply configure the read master for a stride distance of 2 and the write master for a stride distance

of 1. To complete the decimation operation you could also insert a filter between the two masters as well.

Control Field

UG-01085

2014.24.07

Sequence Number Field

22-9

Altera Modular Scatter-Gather DMA

Altera Corporation

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