Rockwell Automation 21G PowerFlex 750-Series AC Drives Programming Manual User Manual

Page 56

Rockwell Automation Publication 750-PM001J-EN-P - October 2014

Chapter 3

Drive Port 0 Parameters

MOT

R CONTROL

r Ctr

l O

pti

Mtr Options Cfg
Motor Options Configuration

RW 32-bit

Integer

Configuration of motor control-related functions. For motors above 200 Hz, a carrier frequency of 8 kHz or higher is recommended. Consider drive derate and motor
lead distance restrictions.

Bit 0 “Zero TrqStop” – Configures stopped condition when in torque mode. 0 = wait for zero speed before shutting off drive output, 1 = wait for zero torque before
shutting off drive output.
Bit 1 “Trq ModeStop” – Configures stopping behavior when in torque mode. 0 = remain in torque mode, 1 = switch to speed mode
Bit 2 “Trq ModeJog” – Configures jogging behavior when in torque mode. 0 = remain in torque mode, 1 = switch to speed mode
Bit 3 “EnclsTrqProv” – Enables encoderless mode when using the torque prove function. 0 = Disabled, 1 = Enabled. Bits 0 and 1 of P1100 [Trq Prove Cfg] must also
be set to use this mode.
Bit 4 “Mtr Lead Rev” – Reverses the phase rotation of the applied voltage, effectively reversing the motor leads. 0 = Not Reversed, 1 = Reversed
Bit 5 “Reflect Wave” – Enables reflected wave voltage protection for long motor cables. 0 = Disabled, 1 = Enabled
Bit 6 “RS Adaption” – Adapts for changes in motor stator resistance due to motor temperature. Active only in FV motor control mode with feedback. 0 = Disabled, 1
= Enabled
Bit 7 “PWM Type Sel” – Configures 3 Phase / 2 Phase switching of the power devices. 0 = 3 Phase modulation with auto switchover to 2 phase modulation. 1 = Full
time 3 phase modulation (no switchover)
Bit 8 “AsyncPWMLock” – Configures Synchronous / Asynchronous switching of the power devices. 0 = Automatically changes between synchronous and
asynchronous. 1 = Asynchronous switching only.
Bit 9 “PWM FreqLock” – Configures switching frequency of the power devices while in FV motor control mode without feedback. 0 = switching frequency
automatically reduces to 2 kHz at low speeds (best performance), 1 = switching frequency does not reduce (setting used when switching frequency reduction is
undesirable)
Bit 10 “DB WhileStop” – Enables operation of the dynamic brake transistor while the drive is stopped. 0 = Disabled, 1 = Enabled
Bit 11 “Elect Stab” – Enables stability control for Sensorless Vector and V/Hz motor control modes. 0 = Disabled, 1 = Enabled
Bit 12 “Xsistor Diag” – Enables power transistor diagnostic test at each start command. Recommended to set to Disabled if an output filter is installed with the
drive. Refer to

publication PFLEX-AT002

for additional information. 0 = Disabled, 1 = Enabled

Bit 13 “Common Mode” – Enables the common mode reduction modulator to reduce the common mode voltage generated by the pulse width modulated inverter.
Bit 15 “Jerk Select” – Limits the rate of change to the velocity reference for improved current limiting. This setting applies only to Sensorless Vector and V/Hz motor
control modes. 0 = Disabled (0.0 second ramp time achievable), 1 = Enabled (0.0 second ramp time prevented)

Grou

No.

Display Name
Full Name
Description

Values

-W

ype

Options

Rese

rk S

ele

Not U

sed

mmon Mod

isto

r D

iag

t S

ileStop

PWM

req

AsyncPWML

ock

M T

ype

Sel

RS A

daption

Reflec

t W

Mtr

ead

(1)

(1) 755 drives only.

q ModeJog

q ModeSt

Default

Bit

32 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

This manual is related to the following products:

20G PowerFlex 750-Series AC Drives Programming Manual 20F PowerFlex 750-Series AC Drives Programming Manual