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Drive (port 0) position control file – Rockwell Automation 21G PowerFlex 750-Series AC Drives Programming Manual User Manual

Page 133

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Rockwell Automation Publication 750-PM001J-EN-P - October 2014

133

Drive Port 0 Parameters

Chapter 3

Drive (Port 0) Position
Control File

Fil

e

Gr

oup

No.

Display Name
Full Name
Description

Values

Re

ad

-Write

Da

ta

T

yp

e

POSITION

C

O

N

TR

O

L

Po

si

ti

on

Cfg/S

ts

720

PTP PsnRefStatus
Point-To-Point Position Reference Status

RO

16-bit
Integer

Displays the current operating status of the Point-To-Point Position Planner in the Position Referencing.

Bit 0 “ZeroFFSpdRef” – Indicates the speed feed forward reference P783 [PTP Speed FwdRef] is zero.
Bit 1 “Ref Complete” – Indicates the position point-to-point feedback P777 [PTP Feedback] reaches the position point-to-point reference P784 [PTP Command],
and the speed forward reference P783 [PTP Speed FwdRef] reaches zero.
Bit 2 “P2P Int Hold” – Indicates the position point-to-point planner integrator is holding. Read back of the point-to-point integral hold bit P770 [PTP Control] Bit 4
“Intgrtr Hold.”
Bit 3 “SpdFFRef En” – Indicates the speed feed forward reference P783 [PTP Speed FwdRef] is active.

721

Position Control
Position Control

RW 32-bit

Integer

Sets bits to enable various position control functions.

Bit 1 “Intgrtr En” – Enables integrator operation. Resetting it resets the integrator.
Bit 2 “Offset ReRef” – Permits changing the value of position offsets without changing actual position. The position offsets are the values that are selected by P820
[Psn Offset 1 Sel] and P822 [Psn Offset 2 Sel]. The default position offsets are P821 [Psn Offset 1] and P823 [Psn Offset 2].
Bit 3 “OffsetVel En” – Uses the offset velocity P824 [Psn Offset Vel] for the position offset integrator. Sets the offset integrator bit, P724 [Psn Reg Status] Bit 0
“OffsetIntgtr” when this bit is on.
Bit 4 “Zero Psn” – Puts P836 [Psn Actual] in absolute mode (no differential) with zero position offset. P836 [Psn Actual] sets the value of P847 [Psn Fdbk] - the
position P725 [Zero Position]. With Bit 4 “Zero Psn” disabled, P836 [Psn Actual] accumulates the difference in P847 [Psn Fdbk] at each position control scan. P836
[Psn Actual] and P847 [Psn Fdbk] are not always the same and therefore, P836 [Psn Actual] is reset. With Bit 4 “Zero Psn” set, P836 [Psn Actual] directly loads the
raw value of P847 after subtracting P725 [Zero Position].
Bit 5 “Intgrtr Hold” – Holds the position integrator in present state.
Bit 6 “PsnWtch1Arm” – Enables the position watch 1. Resetting this bit clears the position watch 1 detection P724 [Psn Reg Status] Bit 9 “PsnW1Detect.”
Bit 7 “PsnWatch1Dir” – Causes the position watch 1 output to be set when P746 [PsnWatch1 DtctIn] is greater than a set-point selected by the position watch 1
selection P745 [PsnWatch1 Select]. Resetting this bit causes the position watch 1 output to be set when P746 [PsnWatch1 DtctIn] is less than a set-point selected
by the position watch 1 selection P745 [PsnWatch1 Select].
Bit 8 “PsnWtch2Arm” – Enables the position watch 2. Resetting this bit clears the position watch 2 detection P724 [Psn Reg Status] Bit 10 “PsnW2Detect.”
Bit 9 “PsnWatch2Dir” – Causes the position watch 2 output to be set when P749 [PsnWatch2 DtctIn] is greater than a set-point selected by the position watch 2
selection P748 [PsnWatch2 DtctIn]. Resetting this bit causes the position watch 2 output to be set when P749 [PsnWatch2 DtctIn] is less than a set-point selected
by the position watch 2 selection P748 [PsnWatch2 DtctIn].
Bit 10 “Add Spd Ref” – Adds the speed reference to the output of the position control, when in position control mode.

Options

Re

se

rv

ed

Re

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rv

ed

Re

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rv

ed

Re

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rv

ed

Re

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rv

ed

Re

se

rv

ed

Re

se

rv

ed

Re

se

rv

ed

Re

se

rv

ed

Re

se

rv

ed

Re

se

rv

ed

Re

se

rv

ed

Spd

FFRef En

PTP I

nt Hold

Re

f C

omple

te

Ze

ro

FFSpdRef

Default

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Bit

15 14 13 12 11 10 9

8

7

6

5

4

3

2

1

0

0 = False
1 = True

Options

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Re

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d

Re

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d

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Re

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Ad

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Ref

Ps

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ch2Dir

(1

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Ps

nW

tc

h2

Ar

m

(1

)

Ps

nW

at

ch1Dir

(1

)

Ps

nW

tc

h1

Ar

m

(1

)

(1) 755 drives only.

Int

gr

tr Hol

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P

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O

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etV

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O

ffs

et Re

Ref

In

tg

rt

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Re

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Default

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

8

7

6

5

4

3

2

1

0

0 = Disabled
1 = Enabled