Adc hl, sp, Operation, Description – Zilog EZ80F916 User Manual
Page 96: Condition bits affected attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
87
ADC HL, SP
ADD with Carry
Operation
HL HL+SP+C
Description
The Stack Pointer and the Carry Flag (C in the F register) are added to the contents of the
HL register. The result is stored in the HL register. In ADL mode, or when the .L suffix is
employed, SPL is used for SP. In Z80 mode, or when the .S suffix is employed, SPS is
used for SP.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set if carry from bit 11; reset otherwise.
P/V
Set if overflow; reset otherwise.
N
Reset.
C
Set if carry from MSB; reset otherwise.
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
ADC
HL,SP
X
2
ED, 7A
ADC.S
HL,SP
1
3
52, ED, 7A
ADC
.L
HL,SP
0
3
49, ED, 7A
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