Zilog EZ80F916 - Manual (Page 237)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
228
LD rr, (HL)
Load Register
Operation
rr
 (HL)
Description
The rr operand is any of the multibyte CPU registers BC, DE, or HL. The CPU writes the
contents of the memory location specified by the HL register to the multibyte rr register.
Condition Bits Affected
None.
Attributes
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD
BC,(HL) 0/1 4/5
ED, 07
LD.S
BC,(HL) 1 5
52, ED, 07
LD.L
BC,(HL) 0 6
49, ED, 07
LD
DE,(HL) 0/1 4/5
ED, 17
LD.S
DE,(HL) 1 5
52, ED, 17
LD.L
DE,(HL) 0 6
49, ED, 17
LD
HL,(HL) 0/1 4/5
ED, 27
LD.S
HL,(HL) 1 5
52, ED, 27
LD.L
HL,(HL) 0 6
49, ED, 27