Add hl, sp, Operation, Description – Zilog EZ80F916 User Manual
Page 105: Condition bits affected attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
96
ADD HL, SP
ADD without Carry
Operation
HL HL+SP
Description
The CPU adds the contents of the multibyte Stack Pointer (SP) register to the contents of
the HL register, and stores the results in the HL register. In ADL mode, or when the .L suf-
fix is employed, SPL is used for SP. In Z80 mode, or when the .S suffix is employed, SPS
is used for SP.
Condition Bits Affected
Attributes
S
Not affected.
Z
Not affected.
H
Set if carry from bit 11; reset otherwise.
P/V
Not affected.
N
Reset.
C
Set if carry from MSB; reset otherwise.
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
ADD
HL,SP
X
1
39
ADD.S
HL,SP
1
2
52, 39
ADD
.L
HL,SP
0
2
49, 39
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