Zilog EZ80F916 - Manual (Page 133)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
124
CPD
Compare and Decrement
Operation
A–(HL)
HL  HL – 1
BC  BC – 1
Description
The CPU compares the contents of the accumulator, A, to the memory location that the
HL register points to, and outputs the difference. This instruction does not affect the con-
tents of the reference memory location or the accumulator. The HL and BC registers dec-
rement.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if A = (HL); reset otherwise.
H
Set if borrow from bit 4; reset otherwise.
P/V
Set if BC – 1  0; reset otherwise.
N
Set.
C
Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
CPD
— X 3
ED, A9
CPD.S
— 1 4
52, ED, A9
CPD.L
— 0 4
49, ED, A9