Ld (ix/y+d), r, Operation, Description – Zilog EZ80F916 User Manual
Page 221: Condition bits affected, Attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
212
LD (IX/Y+d), r
Load Indirect with Offset
Operation
(IX/Y+d) r
Description
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The CPU writes the
contents of the r register to the memory location specified by the contents of the multibyte
Index Register, IX or IY, offset by the two’s-complement displacement d.
Condition Bits Affected
None.
Attributes
jj
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
.
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
LD
(IX+d),r
X
4
DD, jj, dd
LD.S
(IX+d),r
1
5
52, DD, jj, dd
LD.L
(IX+d),r
0
5
49, DD, jj, dd
LD
(IY+d),r
X
4
FD, jj, dd
LD.S
(IY+d),r
1
5
52, FD, jj, dd
LD.L
(IY+d),r
0
5
49, FD, jj, dd
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