Ld ir, ir, Operation, Description – Zilog EZ80F916 User Manual
Page 211: Condition bits affected, Attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
202
LD ir, ir’
Load
Operation
ir
ir’
Description
The ir and ir’ operands are any of the 8-bit CPU registers IXH, IXL, IYH, or IYL. The
CPU writes the contents of the specified register ir’ to the selected register ir.
Condition Bits Affected
None.
Attributes
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
LD
IXH,IXH
X
2
DD, 64
LD
IXH,IXL
X
2
DD, 65
LD
IXL,IXH
X
2
DD, 6C
LD
IXL,IXL
X
2
DD, 6D
LD
IYH,IYH
X
2
FD, 64
LD
IYH,IYL
X
2
FD, 65
LD
IYL,IYH
X
2
FD, 6C
LD
IYL,IYL
X
2
FD, 6D
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