Zilog EZ80F916 - Manual (Page 145)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
136
DEC r
Decrement
Operation
r
 r – 1
Description:
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. The value contained
in the specified register is decremented by 1.
Condition Bits Affected
Attributes
jj
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 52 .
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set is borrowed from bit 4; reset otherwise.
P/V
Set if operand was 80h before operation; reset otherwise.
N
Set.
C
Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
DEC r
X 1
jj