Zilog EZ80F916 - Manual (Page 352)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
343
SLA (HL)
Shift Left Arithmetic
Operation
Description
The (HL) operand is an 8-bit value at the memory location specified by the contents of the
multibyte register (HL). The CPU manipulates the contents of this memory location, (HL),
by shifting them left one bit position. The CPU next copies bit 7 into the Carry Flag and
copies a 0 into bit 0 of the memory location, (HL).
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Reset.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Data from bit 7 of the source.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
SLA
(HL) X 5
CB, 26
SLA.S
(HL) 1 6
52, CB, 26
SLA.L
(HL) 0 6
49, CB, 26
C 7 0
(HL)
0