Zilog EZ80F916 - Manual (Page 207)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
198
LD (HL), r
Load Indirect
Operation
(HL)  r
Description
The r operand is any of A, B, C, D, E, H, L. The CPU stores the contents of the specified
register into the memory location specified by the contents of the multibyte HL register.
Condition Bits Affected
None.
Attributes
jj
identifies the A, B, C, D, E, H, or L register and is assembled into one of the opcodes
indicated in Table 63 .
Mnemonic Operand ADL Mode Cycle Opcode (hex)
LD
(HL),r X 2
jj
LD.S
(HL),r 1 3
52, jj
LD.L
(HL),r 0 3
49, jj
Table 63. Register and jj Opcodes for LD (HL), r Instruction (hex)
Register jj Register jj
A
77
E
73
B
70
H
74
C
71
L
75
D
72