Zilog EZ80F916 - Manual (Page 27)

eZ80
®
CPU
User Manual
UM007715-0415 Memory Mode Switching
18
Memory Mode Switching
ADL Mode and Z80 Mode
The CPU is capable of easily switching between the two available memory modes (ADL
mode and Z80 mode). There are two types of mode changes available to the CPU: persis-
tent and single-instruction. For example, persistent mode switches allow the CPU to oper-
ate indefinitely in ADL mode, then switch to Z80 mode to run a section of Z80 code, and
then return to ADL mode. Conversely, single-instruction mode changes allow certain
instructions to operate using either addressing mode without making a persistent change to
the mode.
Memory Mode Compiler Directives
In the Zilog ZMASM/ZDS assembler, the application code is assembled for a given state
of the ADL mode bit by placing one of the two following compiler directives at the top of
the code:
.ASSUME ADL = 1
.ASSUME ADL = 0
These compiler directives indicate that either ADL MEMORY mode (ADL = 1) or Z80
MEMORY mode (ADL = 0) is the default memory mode for the code being currently com-
piled. The code developer is responsible for ensuring that this source file setting matches
the state of the hardware ADL mode bit when the code is executed.
Opcode Suffixes for Memory Mode Control
When developing application code for CPU applications, care must be taken when manip-
ulating the ADL and Z80 memory modes. Special opcode suffixes are added to the
instruction set to assist with memory mode switching operations. There are four individual
suffixes available for use: .SIS, .SIL, .LIS, and .LIL. These suffixes are appended to
many instructions to indicate that a memory mode change or an exception to standard
memory mode operation is being requested.
Even with the compiler directives described in the section
Memory Mode Compiler
Directives on page 18, the code developer must still employ these opcode suffixes to allow
exceptions to the default memory mode. For example, the opcode suffixes can be used to
allow persistent memory mode switching between ADL and Z80 modes. In addition, there
may be times when ADL mode code may fetch a 16-bit address generated from a section
of Z80 mode code. Alternatively, a section of Z80 mode code may retrieve immediate data
created by a section of ADL mode code. The memory mode control suffixes facilitate
these requirements.