Zilog EZ80F916 - Manual (Page 115)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
106
Bit b, (HL)
Bit Test
Operation
Z  ~(HL)[b]
Description
The (HL) operand is an 8-bit value stored at the memory location specified by the contents
of the multibyte register HL. This instruction tests bit b of this 8-bit value and sets the 0
Flag (Z) if the bit is 0. The Z Flag is reset if bit b of operand (HL) is a one.
Condition Bits Affected
Attributes
kk
= binary code
01 bbb 110
, where
bbb
identifies the bit tested and assembled into the
object code, as indicated in Table 44 .
S
Undefined.
Z
Set if bit b is 0; reset otherwise.
H
Set.
P/V
Undefined.
N
Reset.
C
Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
BIT b
,(HL) X 3
CB, kk
BIT.S b
,(HL) 1 4
52, CB, kk
BIT
.L
b
,(HL) 0 4
49, CB, kk