Zilog EZ80F916 - Manual (Page 372)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
363
TST A, (HL)
Test
Operation
A AND (HL)
Description
The (HL) operand is an 8-bit value at the memory location specified by the contents of the
multibyte register (HL). This 8-bit value is bitwise ANDed with the contents of the accu-
mulator, A. The appropriate flags are set to 1, depending on the result of the AND logical
operation. The contents of the accumulator and the memory location are not altered.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set.
P/V
Set if parity is even; reset otherwise.
N
Reset.
C
Reset.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
TST
A,(HL) X 3
ED, 34
TST.S
A,(HL) 1 4
52, ED, 34
TST.L
A,(HL) 0 4
49, ED, 73