Zilog EZ80F916 - Manual (Page 165)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
156
INC ir
Increment
Operation
ir
 ir+1
Description
The ir operand is any of the 8-bit CPU registers IXH, IXL, IYH, IYL. The contents of the
specified register increment by 1.
Condition Bits Affected
Attributes
S
Set if result is negative; reset otherwise.
Z
Set if result is 0; reset otherwise.
H
Set if carry from bit 3.
P/V
Set if operand was 7Fh before operation; reset otherwise.
N
Reset.
C
Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
INC
IXH X 2
DD, 24
INC
IXL X 2
DD, 2C
INC
IYH X 2
FD, 24
INC
IYL X 2
FD, 2C