Zilog EZ80F916 User Manual
Page 399
eZ80
®
CPU
User Manual
UM007715-0415
Glossary
390
OUTI (OTIR).
Output to I/O and Increment (with Repeat); an input/output instruction.
OUTI2 (OTI2R).
Output to I/O and Increment (with Repeat); an input/output instruction.
OUT0.
Output to I/0 on Page 0; an input/output instruction.
PARC.
Parallel Controls Register.
Parity Bit.
An extra binary bit attached to each byte of synchronous data allowing detection of
transmission errors.
Parity/overflow flag.
The parity/overflow flag is set or reset depending on the operation performed. For
arithmetic operations, this flag indicates an overflow condition when the result in the accumulator is
greater than the maximum possible number (+127) or is less than the minimum possible number (–128).
PARM.
Parallel Mode Register.
PC.
Program Counter (see Program Counter register).
PEA.
Push Effective Address; a load instruction.
Persistent mode.
One of two types of mode changes available to the eZ80
®
. Persistent mode switches
allow the eZ80
®
to operate for long periods in ADL mode, then switch to Z80 mode to run a section of Z80
code, and then return to ADL mode. See single-instruction mode.
phase-locked loop (PLL).
A special analog circuit that controls an oscillator so that it maintains a
constant phase angle relative to a reference signal.
PHI.
System Clock.
PLC.
Production Languages Corporation.
POP.
Retrieve a Value from the Stack; A load instruction.
POR.
Power-On Reset.
PRE.
Prescaler.
Prefetch.
The act of retrieving information (instructions or data) from memory in advance of their
intended use. Pipelined CPUs use a prefetch to gather instructions and data that will be required by the
CPU for future operations.
Program Counter register.
The multibyte Program Counter register stores the address of the current
instruction being fetched from memory.
PUSH.
To store a value in the stack; a load instruction.
P/V.
See Parity/Overflow Flag.
PWM.
Pulse Width Modulator. In digital audio and video systems, the representation of an analog signal by
its direct digitized values.
QAM.
Quadrature Amplitude Modulation. Symbols are represented by a combination of signal amplitude
and phase. QAM is used in modems that are compliant with V.22bis and higher. Sometimes pronounced
kwam
.
RDYE.
Data Ready.
Refresh Counter Register (R).
The Refresh Counter Register (R) contains a count of executed instruction
fetch cycles. The 7 least significant bits (lsb) of the R register are automatically incremented after each
instruction fetch. The most significant bit (msb) can only be changed by writing to the R register. The R