Zilog EZ80F916 - Manual (Page 30)

eZ80
®
CPU
User Manual
UM007715-0415 Memory Mode Switching
21
Suffix Example 2: LD HL, Mmn in ADL Mode
Suffix Example 2 considers the same examples as in Suffix Example 1. However, for this
example, it is assumed that the part begins in ADL mode.
.ASSUME ADL = 1 ;ADL mode operation is default.
LD HL, 3456h ;HL[23:0]
003456h.
;3456h is valid 24-bit value.;Leading 0s are
assumed.
LD HL, 123456h ;HL[23:0]
123456h.
LD.SIS HL, 3456h ;HL[23:0]
{00h, 3456h}.
;.IS directs the eZ80 to fetch
;only 16 bits of data.

;.S forces upper byte of the HL
;register to an undefined state.
LD.LIL HL, 123456h ;Same as LD HL, 123456h, because
;ADL = 1. HL[23:0]
123456h.
;.IL directs eZ80 to fetch 24
;bits of data.

;.L uses all 3 bytes of HL
;register.
LD.LIS HL, 3456h ;HL[23:0]
{00h, 3456h}.
;.IS directs eZ80 to fetch only
;16 bits of data.

;.L uses all 3 bytes of HL
;register.
LD.SIL HL, 123456h ;HL[23:0]
{00h, 3456h}.
;.IL directs eZ80 to fetch 24 bits
;of data.

.S forces upper byte of HL
;register to an undefined state.
From these two suffix examples, it can be seen that with the extensions applied, operation
is consistent regardless of the persistent memory mode in operation at the time. To
explain, a LD.LIS instruction operates in the same manner whether or not the CPU is cur-
rently operating in Z80 mode or ADL mode. The same is also true for the LD.SIS,
LD.SIL
, and LD.LIL instructions.
Suffix Example 3: Risks with Using the .SIL Suffix
As Suffix Examples 1 and 2 demonstrate, special care must be taken when using the .SIL
suffix. Wherever possible, the .SIL suffix should be avoided whenever both segments of
the suffix (.S and .IL) are relevant. The .IL segment of the suffix indicates a long direct
memory address or immediate data in the instruction stream and the CPU reads the 24-bit
value. Because the .S is active, the internal registers are treated as 16-bit registers and the
upper bits (23–16) that were read from the instruction are discarded (replaced with
00h
).
Additionally, all memory WRITEs use Z80 mode employing MBASE. Therefore, the
upper byte of a 24-bit memory WRITE address is replaced by MBASE.