Zilog EZ80F916 - Manual (Page 336)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
327
Condition Bits Affected
None.
Attributes
The opcode (
kk
) is a function of the 8-bit Restart Address, n, and is assembled into one of
the opcodes indicated in Table 93 .
0 .L The starting Program Counter is {MBASE, PC[15:0]}.
Push the 2-byte return address, PC[15:0], onto the SPL
stack. Push a 02h byte onto the SPL stack, indicating an
interrupt from Z80 mode, because ADL = 0. Set the ADL
mode bit to 1. Write {0000h, nn} to PC[23:0]. The
ending Program Counter is PC[23:0] = {0000h, nn}.
1 .L The starting Program Counter is PC[23:0]. Push the 3-
byte return address, PC[23:0], onto the SPL stack. Push
a 03h byte onto the SPL stack, indicating an interrupt
from ADL mode, because ADL = 1. The ADL mode bit
remains set to 1. Write {0000h, nn} to PC[23:0]. The
ending Program Counter is PC[23:0] = {0000h, nn}.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
RST n
n 0/1 5/6
kk
RST.S n
n 1 8
52, kk
RST.L n
n 0 7
49, kk
Table 93. Restart Address and kk Opcodes for RST n Instruction (hex)
Restart
Address
kk
00h C7
08h C
10h D7
18h DF
20h E7
28h EF
Table 92. RST N Instruction Detail