Zilog EZ80F916 - Manual (Page 119)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
110
Bit b, r
Bit Test
Operation
Z

~ r [ b ]
Description
The r operand is any of the 8-bit CPU registers A, B, C, D, E, H, or L. This instruction
tests bit b in the specified register and sets the 0 Flag (Z) if the bit is 0. The Z Flag is reset
if bit b of register r is a one.
Condition Bits Affected
Attributes
jj
= binary code
01 bbb rrr
; where
rrr
identifies the A, B, C, D, E, H, or L register and
bbb
identifies the bit tested and assembled into the object code, as indicated in Table 46 .
S
Undefined.
Z
Set if bit b is 0; reset otherwise.
H
Set.
P/V
Undefined.
N
Reset.
C
Not affected.
Mnemonic Operand ADL Mode Cycle Opcode (hex)
BIT b
,r X 2
CB, jj