Ld ir, r, Operation, Description – Zilog EZ80F916 User Manual
Page 213: Condition bits affected, Attributes

eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
204
LD ir, r
Load
Operation
ir
r
Description
The ir operand is any of the 8-bit CPU registers IXH, IXL, IYH, or IYL. The r operand is
any of the 8-bit CPU registers A, B, C, D, or E. The CPU writes the contents of the speci-
fied register r to the selected register ir.
Condition Bits Affected
None.
Attributes
jj
identifies the A, B, C, D, or E register and is assembled into one of the opcodes indi-
cated in
Mnemonic Operand
ADL Mode Cycle
Opcode (hex)
LD
IXH,r
X
2
DD, jj
LD
IXL,r
X
2
DD, kk
LD
IYH,r
X
2
FD, jj
LD
IYL,r
X
2
FD, kk
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